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  • Erratum
  • Open Access

Erratum to: An optimizing pipeline stall reduction algorithm for power and performance on multi-core CPUs

  • 1Email author,
  • 1,
  • 2 and
  • 1
Human-centric Computing and Information Sciences20155:9

https://doi.org/10.1186/s13673-015-0026-1

  • Received: 25 February 2015
  • Accepted: 4 March 2015
  • Published:

The original article was published in Human-centric Computing and Information Sciences 2015 5:2

Erratum

In the original published version of this article [1], the third co-author’s name Kothari Dwarkadas Pralhaddas appears twice, and the name of the second co-author Alagan Anpalagan is missing. The correct author list is as follows:

Vijayalakshmi Saravanan, Alagan Anpalagan, Kothari Dwarkadas Pralhaddas and Isaac Woungang

The publisher apologies for this error introduced during publication of this article.

Notes

Authors’ Affiliations

(1)
WINCORE Lab, Ryerson University, Toronto, Canada
(2)
I.I.T, Delhi, India

Reference

  1. Saravanan V, Pralhaddas KD, Kothari DP, Woungang I (2015) An optimizing pipeline stall reduction algorithm for power and performance on multi-core CPUs. Human-Centric Comput Inf Sci 5:2View ArticleGoogle Scholar

Copyright

© Saravanan et al.; licensee Springer. 2015

This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/4.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly credited.

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